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high voltage, precision operational amplifier data sheet ada4700 - 1 features low input offset voltage : 0. 2 mv typ ical high output current drive: 3 0 ma wide range of operati ng voltage : 5 v to 50 v high slew rate : 20 v/ s typ ical high gain bandwidth product : 3.5 mhz typ ical t hermal regulation at junction temperature >145c ambient temperature range : ? 40 c to +85 c low input bias current 1 5 n a typ ical applications automated and bench top test equipment high voltage regulators and power amplifiers data acquisition and signal conditioning piezo driver s and predriver s general - purpose current sensing pin configuration figure 1. general description the ada4 700 - 1 is a high voltage , precision , single - channel operational amplifier with a wide operating voltage range ( 5 v to 50 v) and relativel y high output current drive . it s advanced design combines low power ( 170 mw for a 50 v supply ) , high bandwidth ( 3.5 mhz ) , and a high slew rate with unity - gain stability and p hase inversion free performance . the ability to swing near rail to rail at the output enables designers to maximize signal - to - noise ratios (snrs) . the ada4700 - 1 is designed for applications requiring both ac and dc precision performance , making the ada4700 - 1 useful in a wide variety of appl ications, including high voltage test equipment and instrumentation , high voltage regulators and power amplifiers , power supply control and protection, and as an amplifier or buffer for trans ducers with wide output ranges. it is particularly well suited for high intensity led testing applications where it provides highly accurat e voltage and current feedback as well as a predriver to provide accurate voltage and/or current sourcing stimulus to the led string under test. the ada4700 - 1 is specified over the industri al temperature range of ?40c to +85c and includes thermal regulation at a junction temperature greater than 145c and an integrated current limit . the ada4700 - 1 is available in a thermally enhanced, 8 - lead soic package with an exposed pad. figure 2. slew rate nc ?in +in v? nc v+ out nc 1 2 3 4 8 7 6 5 t o p view (not to scale) ADA4700-1 notes 1. nc = no connec t . do not connect t o this pin. 2. connect exposed p ad t o v? or le a ve flo a ting. 1 1551-001 50 ?50 ?40 ?30 ?20 ?10 0 10 20 30 40 5 ?5 ?4 ?3 ?2 ?1 0 1 2 3 4 0 5 10 15 20 25 30 35 40 11551-200 output (v) input (v) time (s) output input ADA4700-1 v sy = 50v a v = 20v/v r l = 2k rev. 0 document feedback information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. specifications subject to change without notice. no licen se is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their respective owners. one technology way, p.o. box 9106, norwood, ma 02062 - 9106, u.s.a. tel: 781.3 29.4700 ? 2013 analog devices, inc. all rights reserved. technical support www.analog.com
ada4700- 1 data sheet table of contents features .............................................................................................. 1 applications ....................................................................................... 1 pin configuration ............................................................................. 1 general desc ription ......................................................................... 1 revision history ............................................................................... 2 specifications ..................................................................................... 3 v sy = 50 v electrical characteristics ....................................... 3 v sy = 24 v electrical characteristics ....................................... 5 v sy = 5 v electrical charateristics ........................................... 7 absolute maximum ratings ............................................................ 8 thermal resistance ...................................................................... 8 esd caution .................................................................................. 8 pin configuration and function descriptions ............................. 9 typical performance characteristics ........................................... 10 test circuits ..................................................................................... 20 theory of operation ...................................................................... 21 thermal regulation ................................................................... 21 applic ations information .............................................................. 22 thermal management ............................................................... 22 safe operating area ................................................................... 22 driving capacitive loads .......................................................... 23 increasing current drive .......................................................... 24 cons tant current applications ................................................ 24 outline dimensions ....................................................................... 25 ordering guide .......................................................................... 25 revision history 8 /13 revision 0: initial version rev. 0 | page 2 of 28
data sheet ada4700- 1 specifications v s y = 50 v electrical charact eristics v sy = 5 0 v, v cm = 0 v , t a = 25c, unless otherwise specified. table 1 . parameter symbol test conditions /comments min typ max unit input characteristics offset voltage v os 0.2 2 m v ?40 c t a +8 5 c 2.5 m v offset voltage drift 1 v os / t ?40c t a +8 5c 2 1 3 v/c input bias current i b 1 5 30 n a ?40c t a +8 5c 50 n a input offset current i os 2 25 n a ?40c t a +85c 30 n a input voltage range ivr ?40c t a +85c (v ? ) + 3 (v+) ? 3 v common - mode rejection ratio cmrr ( v? ) + 3 v v cm (v+) C 3 v 103 108 db ?40c t a +85c 103 db large signal voltage gain a vo ? 4 7 v v out + 4 7 v, r l = 2 k 103 106 db ? 40c t a +85c 100 db input impedance common - mode r in || c incm 2.3 || 5.3 m || pf differential r in ||c indm 2.3 || 0.5 m ||pf output characteristics output voltage high v oh r l = 10 k to gnd 48.0 48.5 v ?40c t a +85c 47.8 v r l = 2 k to gnd 47.5 48.0 v ?40c t a +85c 47.3 v output voltage low v ol r l = 10 k to gnd ? 48.5 ? 48.0 v ?40c t a +85c ? 47.8 v r l = 2 k to gnd ? 48.0 ? 47.5 v ?40c t a +85c ? 47.3 v capacitive load drive 2 c l a v = + 1 1 nf output current drive 3 i out 30 ma short - circuit limit i sc s ourcing / s inking + 72 / ? 6 5 ma closed - loop impedance z out f = 10 0 hz, a v = + 1 0.0 0 1 power supply power supply rejection ratio psrr v sy = 4. 5 v to 5 5 v 110 1 30 db ?40c t a +85c 110 db supply current per amplifier i sy 1. 7 2 .2 ma ?40c t a +85c 2.4 ma dynamic performance slew rate sr v in = 45 v p -p , a v = +1 , r l = 2 k , c l = 3 00 pf 20 v/s gain bandwidth product gbp v in = 5 mv p - p, a v = + 100 3.5 mhz unity - gain crossover ugc v in = 5 mv p - p, a v = + 1 2.6 mhz ?3 db bandwidth ?3 db v in = 5 mv p - p, a v = ? 1 4.8 mhz phase margin m v in = 5 m v p - p, r l = 1 m , c l = 35 pf , a v = ? 1 70 degrees settling time to 0.1% t s v in = 30 v p - p, r l = 10 k, c l = 5 p f, a v = ? 1 4 s settling time to 0.01% t s v in = 30 v p - p, r l = 10 k, c l = 5 pf, a v = ? 1 8 s rev. 0 | page 3 of 28
ada4700- 1 data sheet parameter symbol test conditions /comments min typ max unit noise performance total harmonic distortion + noise thd + n a v = +1, v in = 10 v p - p at 1 khz, r l = 10 k, bandwidth = 80 khz 0.0002 % peak -to - peak noise e n p - p f = 0.1 hz to 10 hz 800 nv p -p voltage noise density e n f = 1 khz 14.7 nv/hz f = 10 hz 27 nv/hz current noise density i n f = 1 khz 400 fa/hz 1 see figure 7 through figure 9 . 2 overshoot vs. temperature and capacitive load performance is shown in figure 27 through figure 30. refer to t he driving capacitive loads section for recommendations on driving capaciti ve loads greater than 1 nf. 3 refer to the safe operating area section. rev. 0 | page 4 of 28
data sheet ada4700- 1 v sy = 24 v electrical charac teristics v sy = 24 v, v cm = 0 v , t a = 25c, unless otherwise specified. table 2 . parameter symbol test conditions/comments min typ max unit input characteristics offset voltage v os 0.2 2 mv ?40c t a +85c 2.5 mv offset voltage drift 1 v os / t ?40c t a +85c 2.5 15 v/c input bias current i b 5 30 n a ?40c t a +85c 50 n a input offset current i os 2 25 n a ?40c t a +85c 30 n a input voltage range ivr ?40c t a +85c (v ? ) + 3 (v+) ? 3 v common - mode rejection ratio cmrr (v ? ) + 3 v v cm (v+) C 3 v 100 103 db ?40c t a +85c 100 db large signal voltage gain a vo ? 21 v v out + 21 v, r l = 2 k 103 105 db ?40c t a +85c 100 db input impedance common - mode r in ||c incm 2.3 || 5.3 m ||pf differential r in || c indm 2.3 || 0.5 m || pf output characteristics output voltage high v oh r l = 10 k to gnd 22.2 22.5 v ?40c t a +85c 22.0 v r l = 2 k to gnd 22.0 22. 4 v ?40c t a +85c 21.8 v output voltage low v ol r l = 10 k to gnd ? 22.5 ? 22.2 v ?40c t a +85c ? 22.0 v r l = 2 k to gnd ? 22.4 ? 22. 0 v ?40c t a +85c ? 21.8 v capacitive load drive 2 c l a v = + 1 1 nf output current drive i out 30 ma short - circuit limit 3 i sc s ourcing/ s inking + 72 / ? 6 5 ma closed - loop impedance z out f = 10 0 hz, a v = + 1 0. 0 01 power supply power supply rejection ratio psrr v sy = 4.5 v to 55 v 110 1 30 db ?40c t a +85c 110 db supply current per amplifier i sy 1.65 2 .1 ma ?40c t a +85c 2.3 ma dynamic performance slew rate sr v in = 20 v p - p, a v = +1 , r l = 2 k, c l = 300 pf 20 v/s gain bandwidth product gbp v in = 5 mv p - p, a v = + 100 3.5 mhz unity - gain crossover ugc v in = 5 mv p - p, a v = + 1 2.6 mhz ?3 db bandwidth ?3 db v in = 5 mv p - p, a v = ? 1 4.8 mhz phase margin m v in = 5 mv p - p, r l = 1 m, c l = 35 pf , a v = ? 1 70 degrees settling time to 0.1% t s v in = 20 v p - p, r l = 10 k, c l = 5 p f, a v = ?1 4 s settling time to 0.01% t s v in = 20 v p - p, r l = 10 k, c l = 5 pf, a v = ?1 9 s rev. 0 | page 5 of 28
ada4700- 1 data sheet parameter symbol test conditions/comments min typ max unit noise performance total harmonic distortion + noise thd + n a v = +1, v in = 10 v p - p at 1 khz, r l = 10 k, b andwidth = 80 khz 0.0002 % peak -to - peak noise e n p - p f = 0.1 hz to 10 hz 800 nv p -p voltage noise density e n f = 1 khz 14.7 nv/hz f = 10 hz 27 nv/hz current noise density i n f = 1 khz 400 fa/hz 1 see figure 7 through figure 9 . 2 overshoot vs. temperature and capacitive load performance is shown in figure 27 through figure 30 . refer to the driving capacitive loads section for recommendations on driving capaciti ve loads greater than 1 nf. 3 refer to the safe operating area section. rev. 0 | page 6 of 28
data sheet ADA4700-1 rev. 0 | page 7 of 28 v sy = 5 v electrical charateristics v sy = 5 v, v cm = 0 v, t a = 25c, unless otherwise specified. table 3. parameter symbol test conditions/comments min typ max unit input characteristics offset voltage v os 0.2 2 mv ?40c t a +85c 2.5 mv offset voltage drift 1 v os /t ?40c t a +85c 3 v/c input bias current i b 5 30 na ?40c t a +85c 50 na input offset current i os 2 25 na ?40c t a +85c 30 na input voltage range ivr ?40c t a +85c ?2 +2 v common-mode rejection ratio cmrr ?2 v v cm +2 v 86 89 db ?40c t a +85c 86 db large signal voltage gain a vo ?2 v v out +2 v, r l = 2 k 97 99 db ?40c t a +85c 95 db input impedance common-mode r in ||c incm 2.3||5.3 m||pf differential r in ||c indm 2.3||0.5 m||pf output characteristics output voltage high v oh r l = 2 k to gnd 3.4 3.6 v ?40c t a +85c 3.2 v output voltage low v ol r l = 2 k to gnd ?3.6 ?3.4 v ?40c t a +85c ?3.2 v capacitive load drive 2 c l a v = +1 1 nf output current drive i out 30 ma short circuit limit 3 i sc sourcing/sinking +72/?65 ma closed-loop impedance z out f = 100 hz, a v = +1 0.003 power supply power supply rejection ratio psrr v sy = 4.5 v to 55 v 110 130 db ?40c t a +85c 110 db supply current per amplifier i sy 1.5 2 ma ?40c t a +85c 2.2 ma dynamic performance slew rate sr v in = 2 v p-p, a v = +1, r l = 2 k, c l = 300 pf 18 v/s gain bandwidth product gbp v in = 5 mv p-p, a v = +100 3.5 mhz unity-gain crossover ugc v in = 5 mv p-p, a v = +1 2.6 mhz ?3 db bandwidth ?3 db v in = 5 mv p-p, a v = ?1 4.8 mhz phase margin m v in = 5 mv p-p, r l = 1 m, c l = 35 pf, a v = ?1 70 degrees settling time to 0.1% t s v in = 6 v p-p, r l = 10 k, c l = 5 pf, a v = ?1 1.5 s noise performance total harmonic distortion + noise thd + n a v = +1, v in = 2 v p-p at 1 khz, r l = 10 k, bandwidth = 80 khz 0.0005 % peak-to-peak noise e n p-p f = 0.1 hz to 10 hz 800 nv p-p voltage noise density e n f = 1 khz 14.7 nv/hz current noise density i n f = 1 khz 400 fa/hz 1 see figure 7 through figure 9. 2 overshoot vs. temperature and capacitive load performance is sh own in figure 27 through figure 30. refer to the driving capaci tive loads section for recommendations on driving capacitive loads greater than 1 nf. 3 refer to the safe operating area section.
ada4700- 1 data sheet absolute maximum rat ings table 4 . parameter rating supply voltage 110 v input voltage v ? v in v+ input current 10 ma differential input voltage v? v in v+ storage temperature range ? 65 c to +150 c operating temperature range 1 ?40 c to +85 c junction temperature range ? 65 c to + 150 c lead temperature (soldering, 60 sec) 300c esd charged device model (cdm) 1250 v human body model (hbm) 4500 v machine model (mm) 200 v 1 refer to the thermal management section. stresses above those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. thermal resistance ja is specified for the worst - ca se conditions, that is, a device soldered in a circuit board for surface - mount packages. the values in table 5 we re obtained per jedec standard jesd51. table 5 . thermal resistance package type ja jc unit 8 - lead soic_n_ep 45 30 c/w board layout impacts t hermal characteristics such as ja . when proper thermal management techniques are used, a better ja can be achieved. refer to the thermal management section for additional information . a lthough the exposed pad can be left floating, it must be connected to an external v? plane fo r proper thermal management. esd caution rev. 0 | page 8 of 28
data sheet ada4700- 1 pin configuration an d function descripti ons figure 3. pin configuration table 6 . pin function descriptions pin o . nemonic description 1 , 5, 8 nc no connect . do not connect to th ese pin s . 2 ? in inverting input . 3 +in noninverting input . 4 v ? negative supply voltage . 6 out output . 7 v+ positive supply voltage . 9 epad exposed pad. connect the exposed pad to v ? or leave floating. the exposed pad is electrically connected to the device. nc ?in +in v? nc v+ out nc 1 2 3 4 8 7 6 5 t op view (not to scale) ADA4700-1 notes 1. nc = no connec t . do not connect t o this pin. 2. connect exposed p ad t o v? or le a ve flo a ting. 1 1551-003 rev. 0 | page 9 of 28
ada4700- 1 data sheet typical performance characteristics t a = 25c, unless otherwise noted . figure 4. input offset voltage distribution, v sy = 5 v figure 5 . input offset voltage distribution, v sy = 24 v figure 6. input offset voltage distribution, v sy = 50 v figure 7. input offset voltage drift distribution, v sy = 5 v figure 8 . input offset voltage drift distribution, v sy = 24 v figure 9. input offset voltage drift distribution, v sy = 50 v 0 10 20 30 40 50 60 70 80 90 ?1500 ?1000 ?500 0 500 1000 1500 number of amplifiers v os (v) ADA4700-1 v sy = 5v v cm = 0v mean = 1 15v 1 1551-004 0 10 20 30 40 50 60 70 80 90 100 number of amplifiers v os (v) ADA4700-1 v sy = 24v v cm = 0v mean = 150v 1 1551-097 ?1500 ?1000 ?500 0 500 1000 1500 ?1500 ?1000 ?500 0 500 1000 1500 0 10 20 30 40 50 60 70 80 90 100 number of amplifiers ADA4700-1 v sy = 50v v cm = 0v mean = 80v v os (v) 1 1551-005 0 5 10 15 20 25 30 0 1 2 3 4 5 6 7 8 9 10 1 1 12 number of amplifiers tcv os (v/c) ADA4700-1 v sy = 5v v cm = 0v mean: 2.7v/c 1 1551-008 0 5 10 15 20 25 30 35 0 1 2 3 4 5 6 7 8 9 10 1 1 12 number of amplifiers tcv os (v/c) ADA4700-1 v sy = 24v v cm = 0v mean: 2.4v/c 1 1551-006 tcv os (v/c) 0 5 10 15 20 25 30 35 40 0 1 2 3 4 5 6 7 8 9 10 1 1 12 number of amplifiers ADA4700-1 v sy = 50v v cm = 0v mean: 2.0v/c 1 1551-009 rev. 0 | page 10 of 28
data sheet ada4700- 1 t a = 25c, unless otherwise noted. figure 10 . input offset voltage (v os ) vs. common - mode voltage (v cm ), v sy = 5 v figure 11 . input offset voltage (v os ) vs. common - mode voltage (v cm ), v sy = 15 v figure 12 . input offset voltage (v os ) vs. common - mode voltage (v cm ), v sy = 50 v figure 13 . input bias current (i b ) vs. common - mode voltage (v cm ) and temperature, v sy = 5 v figure 14 . input bias current (i b ) vs. common - mode voltage (v cm ) and temperature, v sy = 15 v figure 15 . input bias current (i b ) vs. common - mode voltage (v cm ) and temperature, v sy = 50 v +125c +25c ?40c 0 100 300 500 200 400 ?2 ?1 0 1 2 v os (v) v cm (v) ADA4700-1 v sy = 5v 1 1551-010 +85c 0 200 400 300 100 500 ?12 ?9 ?6 ?3 3 0 6 9 12 v os (v) v cm (v) ADA4700-1 v sy = 15v 1 1551-013 ?40c +125c +85c +25c 0 100 ?100 200 ?200 300 400 500 ?47 ?40 ?30 ?20 ?10 0 10 20 30 40 47 v os (v) v cm (v) ?40c +125c +85c +25c ADA4700-1 v sy = 50v 1 1551-0 1 1 ?30 ?20 0 20 10 ?10 30 ?2 ?1 0 1 2 i b (na) v cm (v) ?40c +125c +85c +25c ADA4700-1 v sy = 5v 1 1551-014 ?30 ?20 ?10 0 10 20 30 ?12 ?9 ?6 ?3 0 3 6 9 12 i b (na) v cm (v) ADA4700-1 v sy = 15v +125c +85c +25c 1 1551-012 ?40c ?160 ?20 ?40 ?60 ?80 ?100 ?120 ?140 40 20 0 ?47 ?40 ?30 ?20 ?10 0 10 20 30 40 47 i b (na) ADA4700-1 v sy = 50v v cm (v) ?40c +125c +85c +25c 1 1551-015 rev. 0 | page 11 of 28
ada4700- 1 data sheet t a = 25c, unless otherwise noted. figure 16 . output voltage (v oh ) to supply rail vs. load current , v sy = 5 v to 50 v figure 17 . output current transient settling time (sourcing), v sy = 50 v , refer to figure 56 for the t est c ircuit figure 18 . supply current vs. supply voltage figure 19 . output voltage (v ol ) to supply rail vs. load current, v sy = 5 v to 50 v figure 20 . output current transient settling time (sinking), v sy = 50 v , refer to figure 57 for the t est c ircuit 0.1 1 10 0.001 0.01 0.1 1 10 100 load current (ma) ?40c +125c +25c +85c output (v oh ) t o supp l y rai l (v) ADA4700-1 v sy = 5v t o 50v sourcing current 1 1551-016 ?5 ?4 ?3 ?2 ?1 0 1 2 4 3 output amplitude (mv) v control time (1s/div) ADA4700-1 v sy = 50v a v = +1 load = 20ma sourcing output 11551-079 on off 0 0.5 1.0 1.5 2.0 0 5 10 15 20 25 30 35 40 45 50 supp l y current (ma) supp l y vo lt age (v) ADA4700-1 ?40c +125c +85c +25c 1 1551-022 0.1 1 10 0.001 0.01 0.1 1 10 100 load current (ma) output (v ol ) t o supp l y rai l (v) ADA4700-1 v sy = 5v t o 50v sinking current ?40c +125c +25c +85c 1 1551-020 11551-087 ?3 ?4 ?5 ?2 ?1 0 1 2 3 4 output amplitude (mv) v control time (1s/div) ADA4700-1 v sy = 50v a v = +1 load = 20ma sinking on off output rev. 0 | page 12 of 28
data sheet ada4700- 1 t a = 25c, unless otherwise noted. figure 21 . unity - gain bandwidth vs. temperature , v sy = 50 v figure 22 . open - loop gain and phase vs. frequency, v sy = 5 v to 50 v figure 23 . closed - loop gain vs. frequency, v sy = 5 v to 50 v figure 24 . unity - ga in bandwidth vs. load capacitance and temperature, v sy = 50 v figure 25 . open - loop gain vs. load current for various supply voltages figure 26 . open - loop gain vs. temperature for various load resistances, v sy = 50 v 2.1 2.3 2.5 2.7 2.9 3.1 ?40 ?25 ?10 5 20 35 50 65 80 95 1 10 125 unit y -gain bandwidth (mhz) temper a ture (c) v cm = ?47v v cm = +47v v cm = 0v 1 1551-025 ADA4700-1 v sy = 50v r l = 1m? c l = 200pf ?135 ?90 ?45 0 45 90 135 180 ?150 ?100 ?50 0 50 100 150 200 100 1k 10k 100k 1m 10m gain (db) frequency (hz) phase (degrees) ADA4700-1 v sy = 5v to 50v v cm = 0v r l = 1m c l = 35pf 11551-030 phase gain ?30 ?20 ?10 0 10 20 30 40 50 10 100 1k 10k 100k 1m 10m gain (db) frequenc y (hz) a v = +100 a v = +10 a v = +1 ADA4700-1 v sy = 5v t o 50v 1 1551-023 2.1 2.3 2.5 2.7 2.9 3.1 3.3 0 20 40 60 80 100 120 140 160 180 200 unit y -gain bandwidth (mhz) load ca p acitive (pf) ADA4700-1 v sy = 50v r l = 2k? +25c ?40c +85c +125c 1 1551-096 90 95 100 105 1 10 0 5 10 15 20 25 load current (ma) ADA4700-1 gain (db) v sy = 5v v sy = 15v v sy = 50v 1 1551-029 100 105 1 10 1 15 ?40 ?25 ?10 5 20 35 50 65 80 95 1 10 125 gain (db) temper a ture (c) ADA4700-1 v sy = 50v r l = 2k r l = 10k 1 1551-031 rev. 0 | page 13 of 28
ada4700- 1 data sheet t a = 25c, unless otherwise noted. figure 27 . small signal overshoot vs. temperature for various capacitance loads, v sy = 5 v figure 28 . small signal overshoot vs. temperature for various capacitance loads, v sy = 50 v figure 29 . small signal overshoot vs. temperature for various capacitance loads, v sy = 15 v figure 30 . small signal overshoot vs. load capacitance, v sy = 5 v to 5 0 v 0 10 20 30 40 ?40 ?25 ?10 5 20 35 50 65 80 95 1 10 125 overshoot (%) c l = 100pf c l = 1000pf c l = 300pf c l = 500pf ADA4700-1 v sy = 5v v in = 50mv a v = +1 r l = 10k temper a ture (c) 1 1551-046 0 10 20 30 40 ?40 ?25 ?10 5 20 35 50 65 80 95 1 10 125 overshoot (%) c l = 100pf c l = 1000pf c l = 300pf c l = 500pf ADA4700-1 v sy = 50v v in = 50mv a v = +1 r l = 10k temper a ture (c) 1 1551-047 0 10 20 30 40 ?40 ?25 ?10 5 20 35 50 65 80 95 1 10 125 overshoot (%) ADA4700-1 v sy = 15v v in = 50mv a v = +1 r l = 10k temper a ture (c) c l = 1000pf c l = 500pf c l = 300pf c l = 100pf 1 1551-044 0 10 20 30 40 50 60 1 10 100 1000 10000 100000 overshoot (%) load ca p aci t ance (pf) ?os +os ADA4700-1 v sy = 5v t o 50v v in = 50mv a v = +1 r l = 10k 1 1551-045 rev. 0 | page 14 of 28
data sheet ada4700- 1 t a = 25c, unless otherwise noted. figure 31 . total harmonic distortion + noise ( thd + n oise ) vs. amplitude, v sy = 5 v figure 32 . total harmonic distortion + noise (thd + noise) vs. amplitude, v sy = 15 v figure 33 . total harmonic distortion + noise (thd + noise) vs. amplitude, v sy = 50 v figure 34 . total harmonic distortion + noise (thd + noise) v s. frequency, v sy = 5 v figure 35 . total harmonic distortion + noise (thd + noise) vs. frequency, v sy = 15 v figure 36 . total harmonic distortion + noise ( thd + noise ) vs. frequency, v sy = 50 v 0.0001 0.001 0.01 0.1 1 10 0.001 0.01 0.1 1 10 thd + noise (%) amplitude (v p-p) r l = 2k r l = 10k ADA4700-1 v sy = 5v v cm = 0v f in = 1khz 1 1551-071 0.0001 0.001 0.01 0.1 1 10 0.001 0.01 0.1 1 10 100 thd + noise (%) amplitude (v p-p) ADA4700-1 v sy = 15v v cm = 0v f in = 1khz r l = 2k r l = 10k 1 1551-072 0.0001 0.001 0.01 0.1 1 10 0.001 0.01 0.1 1 10 100 thd + noise (%) amplitude (v p-p) r l = 2k r l = 10k 1 1551-073 ADA4700-1 v sy = 50v v cm = 0v f in = 1khz 0.0001 0.001 0.01 0.1 10 100 1k 10k 100k thd + noise (%) frequenc y (hz) v in = 2v p-p r l = 2k? v in = 3v p-p r l = 10k? ADA4700-1 v sy = 5v v cm = 0v 80khz lo w - p ass fi l ter 1 1551-074 thd + noise (%) 0.0001 0.001 0.01 0.1 10 100 1k 10k 100k frequenc y (hz) v in = 10v p-p r l = 10k? v in = 2v p-p r l = 2k? ADA4700-1 v sy = 15v v cm = 0v 80khz lo w -p ass fi l ter 1 1551-075 0.0001 0.001 0.01 0.1 10 100 1k 10k 100k thd + noise (%) frequenc y (hz) v in = 10v p-p r l = 10k? v in = 2v p-p r l = 2k? ADA4700-1 v sy = 50v v cm = 0v 80khz lo w - p ass fi l ter 1 1551-076 rev. 0 | page 15 of 28
ada4700- 1 data sheet t a = 25c, unless otherwise noted. figure 37 . common - mode rejection ratio (cmrr) vs. frequency, v sy = 5 v to 50 v figure 38 . power supply rejection ratio (psrr) vs. frequency, v sy = 5 v to 50 v figure 39 . common - mode rejection ratio (cmrr) vs. temperature for various supply voltages figure 40 . power supply rejection ratio (psrr) vs. temperature 0 140 120 100 80 60 40 20 10 100 1k 10k 100k 1m cmrr (db) frequenc y (hz) ADA4700-1 v sy = 5v to 50v 1 1551-038 v cm = (v+) ? 3v v cm = (v?) + 3v ?20 0 20 40 60 80 100 140 120 10 100 1k 10k 100k 1m 10m psrr (db) frequency (hz) +psrr ?psrr ADA4700-1 v sy = 5v to 50v 11551-033 80 90 100 1 10 120 ?40 ?25 ?10 5 20 35 50 65 80 95 1 10 125 cmrr (db) temper a ture (c) v sy = 5v v sy = 15v v sy = 50v ADA4700-1 v cm = 0v 1 1551-041 120 125 130 135 140 ?40 ?25 ?10 5 20 35 50 65 80 95 1 10 125 psrr (db) temper a ture (c) ADA4700-1 v sy = 4.5v t o 55v 1 1551-037 rev. 0 | page 16 of 28
data sheet ada4700- 1 t a = 25c, unless otherwise noted. figure 41 . closed - loop output impedance (z out ) vs. frequency, v sy = 5 v figure 42 . positive output overload recovery, v sy = 50 v figure 43 . no phase reversal , v sy = 50 v figure 44 . closed - loop output impedance (z out ) vs. frequency, v sy = 50 v figure 45 . negative output overload recovery, v sy = 50 v 0.0001 0.001 0.01 0.1 1 10 100 1000 10 100 1k 10k 100k 1m 10m frequenc y (hz) z out (?) ADA4700-1 v sy = 5v a v = +100 a v = +10 a v = +1 1 1551-032 0 2 4 6 8 10 12 14 16 time (s) ?10 ?5 0 5 ?20 0 20 40 60 output vo lt age (v) input vo lt age (v) ADA4700-1 v sy = 50v v in = 7.5v p-p a v = ?10 output input 1 1551-061 ? 60 ? 40 ? 20 20 output (v) time ( s) 0 40 60 0 20 40 60 80 100 120 140 160 180 200 input output ADA4700-1 v sy = 50v a v = +1 11551-069 0.001 0.01 0.1 1 10 100 1000 10 100 1k 10k 100k 1m 10m frequenc y (hz) ADA4700-1 v sy = 50v a v = +100 a v = +10 a v = +1 1 1551-035 z out (?) ?60 ?40 ?20 0 20 ?10 ?5 0 5 10 0 2 4 6 8 10 12 14 16 output vo lt age (v) input vo lt age (v) ADA4700-1 v sy = 50v v in = 7.5v p-p a v = ?10 output input time (s) 1 1551-064 rev. 0 | page 17 of 28
ada4700- 1 data sheet t a = 25c, unless otherwise noted. figure 46 . input voltage noise density vs. frequency figure 47 . 0.1 hz to 10 hz noise, v sy = 5 v figure 48 . i nput current noise density vs. frequency figure 49 . 0.1 hz to 10 hz noise, v sy = 50 v 1 10 100 1k 1 10 100 1k 10k 100k volt age noise densit y (nv/hz) frequenc y (hz) ADA4700-1 v sy = 5v t o 50v v cm = 0v 1 1551-057 ADA4700-1 v sy = 5v v cm = 0v time (1s/div) input referred vo lt age (200nv/div) 1 1551-056 0.1 1 10 1 10 100 1k 10k frequenc y (hz) current noise densit y (pa/hz) ADA4700-1 v sy = 5v t o 50v v cm = 0v 1 1551-058 time (1s/div) ADA4700-1 v sy = 50v v cm = 0v input referred vo lt age (200nv/div) 1 1551-059 rev. 0 | page 18 of 28
data sheet ada4700- 1 t a = 25c, unless otherwise noted. figure 50 . small signal transient response , v sy = 50 v figure 51 . slew rate (sr) vs. temperature, v sy = 50 v figure 52 . 0.01% and 0.1% settling time vs. step size, v sy = 15 v figure 53 . large signal transient response, v sy = 50 v figure 54 . 0.01% and 0.1% settling time vs. step size, v sy = 5 v figure 55 . 0.01% and 0.1% settling time vs. step size, v sy = 50 v ?0.08 ?0.06 ?0.04 ?0.02 0 0.02 0.04 0.06 0.08 18 20 0 2 4 6 8 10 12 14 16 vo lt age (v) time (s) ADA4700-1 v sy = 50v a v = +1 r l = 2k? c l = 300pf 1 1551-060 C40c t a +125c 0 5 10 15 20 25 30 35 ?40 ?25 ?10 5 20 35 50 65 80 95 1 10 125 slew r a te (v/s) +sr temper a ture (c) ADA4700-1 v sy = 50v a v = +1 v out = 45v r l = 2k? c l = 300pf 1 1551-062 ?sr 0 2 4 6 8 10 0 5 10 15 20 25 settling time (s) step size (v) 0.1% 0.01% ADA4700-1 v sy = 15v a v = ?1 r l = 10k? c l = 20pf 11551-068 ?60 ?40 ?20 0 20 40 60 0 4 8 12 16 20 24 28 32 36 40 volt age (v) time (s) ADA4700-1 v sy = 50v a v = +1 v out = 45v r l = 2k? c l = 300pf ?40c +25c +125c +85c 1 1551-063 0 2 4 6 8 0 2 4 6 8 settling time (s) ste p size (v) 0.01% 0.1% ADA4700-1 v sy = 5v a v = ?1 r l = 10k? c l = 20pf 1 1551-065 0 2 4 6 8 10 0 5 10 15 20 25 30 35 settling time (s) ste p size (v) 0.01% 0.1% ADA4700-1 v sy = 50v a v = ?1 r l = 10k? c l = 20pf 1 1551-066 rev. 0 | page 19 of 28
ada4700- 1 data sheet test circuits figure 56 . test circuit for output current transient settling time (sourcing) shown in figure 17 figure 57 . test circuit for output current transient settling time (sinking) shown in figure 20 750? ?50v +50v v control ?15v v out 1 1551-082 750? +15v v out 1 1551-098 v control ?50v +50v rev. 0 | page 20 of 28
data sheet ada4700- 1 theory of operation figure 58 . simplified schematic of the ada4700 - 1 the ada4700 - 1 is a high voltage operatio nal amplifier featuring a slew enhanced bipolar input stage that provides all of the voltage g ain. single stage amplifiers are noted for their excellent stability but poor open - loop gain ; however, the advanced ada4700 - 1 design pr ovides gain comparabl e to multi stage amplifiers and , therefore , combines the advantages of both. referring to figure 58 , the input stage is formed by q5 to q8 loaded by the curren t mirrors , q9 to q14. the output stage is of the c omplementary darlington type formed by q15 to q18. like other bipolar amplifiers, the input stage is internally clamped to prevent degradation with large differential inputs ; however, the addition of q1 and q2 in conjunction with the high voltage d iodes , d1 and d2 , maintain high differential input impedance even when the voltage betwee n the inputs is equal to the supply voltage. this configuration makes the ada4700 - 1 suitable for applications with unavoidable large differential voltages, such as rectifiers, peak detectors, and comparators. the ada4700 - 1 uses a sin gle - pole compensation set by c3 and c4. the internal snubber networks , r1/c1 and r2/c2 , further enhance the stability. this design enables large capacitive loads to be driven without the risk of oscillation. the q19 and q20 transistors in conjunction with the r3 and r4 resistors provide output short - circuit protection. additionally, a thermal regulating circuit (not shown in figure 58 ) limits the die temperature to 145c or greater to protect against excessive power dissipation. with approximately equal split supplies up to 50 v , the output can be shorted to ground unconditionally ; however, operating this way is not recommended . if the voltage between the output and either supply is more than 60 v, avoid a short circuit to the s upply . t ransient dissipation in the output transistors can exceed their safe operating area and cause subsequent destruction. thermal regulation the circuitry for thermal regulation of the ada4700 - 1 is dependent on the ambient temperature and time duration of the current drive. when thermal regulation of the ada4700 - 1 is activ e , the supply current, i sy , reduces from 1.7 ma to 300 a. t he output stage remains biased during thermal regulation due to the paras i tics of the output devices in conjunction with the elevated die temperature. for example, with a current drive, i out , of 30 ma for 1 8 0 seconds and with an ambient temperature of 85c, the thermal regulation is triggered at a junction temperature of 145c with an output current level of 22 ma. for additional information, refer to the thermal management section and the safe operating area section . r1 r3 10 ? r4 10 ? r2 c2 q20 q19 d9 d10 d6 d5 ?in i 2 i 1 i 3 i 4 d7 d2 d1 d3 d5 d6 c4 c3 d8 q17 q15 q18 q2 q8 q7 q1 q6 d4 q4 q5 q10 +in out v+ v? q11 q9 q13 q14 q12 q3 q16 c1 i 6 i 5 11551-088 rev. 0 | page 21 of 28
ada4700- 1 data sheet applications informa tion thermal management thermal management of high power amplifier s such as the ada4700 - 1 is an essential consideration in system design. two conditions affect junction temperature (t j ) : power dissipatio n (p d ) of the device and ambient temperature (t a ) surrounding the package. this relationship is shown in equation 1 . t j = p d ja + t a (1) where ja is the thermal resistance between the die and the ambient environment. power dissipation is the sum of quiescent power of the device and the power required to drive a load. power dissipation for the sourcing current is shown in equation 2 . p d = (( v+) ? ( v?) ) i sy + (( v+) ? v out ) i out (2) replace ((v+) ? v out ) in equation 2 with ((v?) ? v out ) when sink ing current. t he specified thermal resistance of the ada4700 - 1 is 45 c/w . printed circuit board (pcb) layout and an external heat sink can improve thermal performance by reducing ja . to re duce the thermal resistance between the junction and ambient environment, the exposed pad of the ada4700 - 1 can be soldered to the v? plane layer of the pcb, which acts as a heat sink. by u sing the pcb layout shown in figure 60, ja reduce s to 26c/w. the ada4700 - 1 guards the die from exceeding the absolute maximum temperature. when the die reaches a junction temperature greater than 145c, thermal regulation is triggered , the supply current is reduced , and the output load current is limited. safe operating area the s afe operating area (soa) of figure 59 is the range of voltage s, currents, and temperature s under which an amplifier can safely operate without failure. it is directly dependent on the ambient temperature and the thermal resistance. figure 59 shows the soa for the ada4700 - 1 at steady state using the pcb shown in figure 60. the duration of the 30 ma load driven is 1 8 0 seconds . different time intervals produce alternate sets of curves. t he guaranteed ambient temperature range of the ada4700 - 1 is ? 40c to +85c. the 125c shown in figure 59 is for reference only . to maintain normal operation, the ada4700 - 1 must rem ain in the soa (area under each curve) up to an ambient temperature of 85c . figure 59 . safe operating area with ? ja = 26 c/w figure 60 . thermal landing and pcb material used to obtain a ? ja of 26c/w 0 5 10 15 20 25 30 35 1 10 100 i out (ma) v cc ? v out (v) 1 1551-102 101 v+ = +6v to +100v + ? v? = ?3v +3v v out ?40c +25c +85c ja = 26c/w +125c p a d 1 2 3 4 8 7 6 5 11551-103 copper top/bottom: 1.5oz internal layers: 1oz 4-layer fr4 pcb with internal ground and power plane. 25.4mm (1000mil) 9.65mm (380mil) 12.7mm (500mil) 6.1mm (240mil) 9.65mm (380mil) landing vias: epoxy filled array: 3 4 diameter: a = 0.3048mm (12mil) pitch: b = 0.762mm (30mil) a b paddle vias: epoxy filled array: 10 8 diameter: a = 0.3048mm (12mil) pitch: c = 1.27mm (50mil) c rev. 0 | page 22 of 28
data sheet ada4700- 1 driving capacitive l oads although the ada4700 - 1 behav es well when driving capacitive loads , c l , as seen in figure 27 to figure 30 , extra compensation can improve the respo nse when large capacitances need to be accommodated. the simplest way of accomplishing this is with a snubber network , as shown in figure 61. figure 61 . snubber n etwork for unity - gain applications and capacitive loads up to 1 n f, r snub = 150 ? and c snub = 10 nf works well . results for this circuit are shown in figure 64 . with higher closed - loop gains, lighter snubbing can be used. for capacitive loads up to 10 nf , the snubber must be larger . figure 65 shows the r esults of using a n r snub = 22 ? , c snub = 100 nf , and c l = 10 nf with the ada4700 - 1 in a gain of 10. because the snubber network places an ac load on the amplifier, s nubbing does not work well when larger capacitive loads are used, or when large transients are present. a better approach is to use a bypass network in the feedback path , as shown in figure 62. figure 62 . unity - gain configuration with bypass network the bypass network in figure 62 pe r forms well with loads up to 100 nf . the resulting waveforms are shown in figure 66 for various output amplitudes . for heavier loads, c apacitive feedback , c fb , must be increased. the configuration in figure 62 can be modified to work with gains greater than 1. figure 63 shows a bypass network with a gain of 10 system , and results for various output amplitudes are shown in figure 67. figure 63 . bypass network with gain of 10 system figure 64 . results from snubber network with a v = +1 and c l = 10 pf to 1 nf figure 65 . results from snubber network with higher gains , c l = 10 nf figure 66 . results of bypass network for various output amplitudes , unity g ain with c l = 100 nf r snub v out v in c snub c l 1 1551-084 v out v in 3.3k 22 10nf 1 1551-089 c fb c l v out v in 3.3k c fb 5.1k 43k 22 1 1551-090 c l ?10 ?8 ?6 ?4 ?2 0 2 4 6 8 10 0 2 4 6 8 10 12 14 volt age (v) time (s) output input 1 1551-093 v sy = 50v a v = +1 c l = 10pf to 1nf ?15 ?10 ?5 0 5 10 15 0 0.2 0.4 0.6 0.8 time (ms) output (v) 1.0 1.2 1.4 v sy = 50v a v = +10 c l = 10nf 11551-099 ?10 ?8 ?6 ?4 ?2 0 2 4 6 8 10 0 0.2 output (v) 0.4 0.6 time (ms) 0.8 1.0 1.2 v sy = 50v a v = +1 c l = 100nf 1 1551-100 rev. 0 | page 23 of 28
ada4700- 1 data sheet figure 67 . result of bypass network with a v = +10 and c l = 100 nf increasing c urrent d rive extra output current can be obtained by adding external driver transistors. crossover distortion is minimized by allowing the amplifier to drive the lower currents directly via the bypass resistor , as is shown in figure 68 . this circuit can provide a few hundred miliamps ; however, keep the driver transistors within their safe operating area. for heavier loads (up to 5 a) , power d arlingtons can be used , as is shown in figure 69. figure 68 . increasing current drive using discrete transistors figure 69 . bilateral current source with transfer function 1 ma/v constant current app lications when a constant current with high compliance is needed, the ada4700 - 1 can be used as a modified howland current pump. the values shown in figure 70 yield a transfer function of 1 ma / v. applying this analysis to the modified howland current pump in figure 71 results in an output capability of 1 a /v . figure 70 . transfer function of 1 ma/v figure 71 . modified howland current pump ?50 ?40 ?30 ?20 ?10 0 10 20 30 40 50 0 0.5 1.0 time (ms) output (v) 1.5 2.0 11551-101 v sy = 50v a v = +10 c l = 100nf +v +v i out v in 180 2n5550 2n5401 1 1551-085 i out v in 270 ?v +v bdw93c bdw94c 1 1551-091 r3 100k r4 49.5k r set 500 i out = r2 50k r1 100k +v in i out 1 1551-086 r set ?v in r 1 r 2 if r 2 = r 4 + r set and r 1 = r 3 bdw93c bdw94c 10k 20k i out v in 270 0.5 ?v +v 20k 10k 1 1551-092 rev. 0 | page 24 of 28
data sheet ada4700- 1 outline dimensions figure 72 . 8- lead standard small outline package with exposed pad [soic_n_ep] narrow body (rd - 8- 2) dimensions shown in millimeters ordering guide model 1 temperature range package description package option ada4700 - 1ardz ?40c to +85c 8 - lead standard small outline package with exposed pad [soic_n_ep] rd -8 -2 ada4700 - 1ardz -r7 ?40c to +85c 8 - lead standard small outline package with exposed pad [soic_n_ep] rd -8 -2 ada4700 - 1ardz -rl ?40c to +85c 8 - lead standard small outline package with exposed pad [soic_n_ep] rd -8 -2 1 z = rohs compliant part. compliant t o jedec s t andards ms-012-a a 06-03-20 1 1-b 1.27 0.40 1.75 1.35 2.41 0.356 0.457 4.00 3.90 3.80 6.20 6.00 5.80 5.00 4.90 4.80 0.10 max 0.05 nom 3.81 ref 0.25 0.17 8 0 0.50 0.25 45 coplanarit y 0.10 1.04 ref 8 1 4 5 1.27 bsc sea ting plane for proper connection of the exposed pad, refer to the pin configuration and function descriptions section of this data sheet. bot t om view top view 0.51 0.31 1.65 1.25 3.098 rev. 0 | page 25 of 28
ada4700- 1 data sheet notes rev. 0 | page 26 of 28
data sheet ada4700- 1 notes rev. 0 | page 27 of 28
ada4700- 1 data sheet notes ? 2013 analog devices, inc. all rights reserved. trademarks and registered trademarks are the property of their respective owners. d11551 - 0 - 8/13(0) rev. 0 | page 28 of 28

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